Pulsic Selected by Elpida Memory, Inc. for New 0.11µm Tool Flow

Design Automation Conference, Anaheim (CA), 2 June 2003 – Pulsic Limited, the British EDA company that delivers breakthrough shape-based methodologies to the IC layout market, today announced that Elpida Memory, Inc. has selected the company’s Lyric Physical Design Framework™ product suite for use in its new 0.11µm tool flow.

Elpida, a technology leader in Dynamic Random Access Memory (DRAM) products, is currently enhancing its latest 0.11µm manufacturing compliant process. During the definition phase of this project Elpida identified the most time consuming activity as being the routing of the peripheral logic, where rows of standard cells are positioned between the memory cores in the design. This most difficult and intensive phase of DRAM/SRAM design is currently done using a combination of manual and older automatic legacy tools, but those tools cannot provide the quality of results required.

In order to address these complex routing issues, Elpida undertook an extensive evaluation of potential solutions from other EDA vendors. “We approached Pulsic with a seemingly impossible problem,” stated Mr. Yoshitake Tsuruoka, Manager of the Design Automation Layout Technology Group, Marketing & Design Office at Elpida, “Memory designs require special wiring attention in order to achieve the necessary peripheral logic interconnect. We needed tools with the ability to handle minimal linear channel trunk routing (including coincident routing), optimal re-ordering within the channels, and efficient resolution to the inevitable switch-box problem.”

Tsuruoka continued, “Pulsic came to us with an open mind and took on board the current problem areas and bottlenecks in our DRAM design flow. Building on their existing technology, Pulsic then developed a valuable set of tools which specifically addressed our pain-point areas. The memory routing suite within the Lyric Framework now provides us with the ability to automatically route both peripheral logic and final chip assembly, producing the required optimal linear channel trunks at a rate of approximately 10K nets every 5 seconds, which is an outstanding achievement. Pulsic provided us with a quality of result, using a combination of automation and intelligent interactive capabilities, that were not possible with the other tools we evaluated,” he concluded.

Fumiaki Sato, VP Business Development Japan at Pulsic said, “Adding a high profile customer such as Elpida, who are at the leading edge of memory chip design and technology, to our customer portfolio is testament to the calibre of the Pulsic tools and team, and to the power and flexibility of our underlying proprietary shape-based methodology.”

The Lyric Physical Design Framework will be used in Elpida’s new 0.11µm flow for DRAM designs. It will be used both in the early design phase as part of floorplan estimation and will provide wiring prototyping, in addition to being used in the full detailed design phase to provide the final peripheral logic interconnect. The Lyric framework is provided to Elpida through Seiko Instruments Inc., one of Pulsic’s distribution partners.

About the New Lyric Physical Design Framework
The recent launch of the Lyric Physical Design Framework (May 2003) incorporates many new tools and features, in addition to the new routing tool suite for memory designs. These comprise placement capabilities, including cell push-aside to make space for new or relocated instances, extensive support for leading deep sub-micron (DSM) rules and processes, including slotting and 45 degree routing rules, and much more. This release also provides support for 64 bit architectures.

The Lyric Framework also offers advanced IC routing features, extraction-based timing, process rules and signal integrity prevention and resolution, and an array of interactive editing capabilities, all with the flexibility associated with shape-based methodologies. These powerful features combine to accelerate the design process and remove the necessity to use additional tools to resolve the issues associated with today’s deep sub-micron designs.

About Elpida Memory, Inc.
Elpida Memory, Inc. is a technology leader in Dynamic Random Access Memory (DRAM) with headquarters based in Tokyo, Japan, and sales and marketing operations located in Japan, North America, Europe and Asia. Elpida offers a broad range of leading-edge DRAM products including RDRAM®, SDRAM, DDR SDRAM and Mobile RAM. Device densities currently range up to 512 Megabits each, and Module (DIMM) densities range up to 2 Gigabytes each. Elpida offers a variety of standard and high performance packaging techniques, including TSOP, BGA, FBGA, Tape Carrier Package (TCP), and Double Density Package (DDP). Elpida’s research, design and development operations began as a joint venture between NEC and Hitachi on April 1, 2000, and sales and marketing operations commenced in Q1, 2001.