Create high-quality analog layouts 60% faster!

Speed up your final layout with Animate Preview and Preview Plus.

Accelerate your analog layout

Go from schematic to completed layout in less time with Animate Preview. Reduce analog layout time up to 60%, with an initial layout from Animate Preview. Animate Preview creates high-quality initial layouts from the schematic in minutes, save them to OpenAccess to finish editing in your normal editing tool.

Explore the alternatives

Animate Preview creates multiple different layouts topologies for your circuit. Choose the layout that best meets your needs. Change the parameters of your circuit and explore the possibilities in minutes instead of hours or days.

“Animate provided excellent results equal to using traditional approaches but in far less time”

Stretch Young Layout Director at Silicon Laboratories

Automatic constraints

Animate Preview is truly analog aware. It understands your circuit and automatically recognizes analog circuit features like current mirrors and differential pairs. 

Animate Preview creates constraints for itself and automatically creates high-quality matched layout for your circuit. Changing the constraints is quick and easy if you need to tweak things.

DRC clean layout using your pcells and design rules

Animate Preview uses your existing PDK, pcells, and design rules to create DRC clean layout in minutes. Save the layout to OpenAccess including parameterized instances, full connectivity, wells, guards rings, etc.

Pick the version that is right for you

All Animate products feature Pulsic’s polymorphic layout technology

  • Recognition of analog structures
  • Physical preview from schematic
  • DRC clean layout
  • Schematic cross-probing
  • Layout area report
  • Enlarged layout preview
  • Automatic updates
  • Matched layout patterns
  • Drag-n-drop editing

Preview

  • Save black-box view to OA
  • Pins
  • Design outline
  • Online support

Preview Plus

  • Save black-box view to OA
  • Save initial layout to OA
  • Pins
  • Design outline
  • Schematic driven layout
  • Device/pCell placement
  • Well shapes and guard rings
  • Poly contacts
  • Enterprise priority support