ON Semiconductor Licenses Pulsic’s Lyric Physical Design Framework
Bristol, England – January 18, 2005 – Pulsic Limited, the EDA company that delivers shape-based, IC physical design solutions for analog, mixed-signal, memory and custom digital designs, today announced that it has licensed its Lyric Physical Design Framework to ON Semiconductor, a leading provider of data and power management semiconductors headquartered in Phoenix, Ariz.
ON Semiconductor has licensed Lyric components for detailed floorplanning, standard cell placement, interactive editing and automatic routing of its next generation of mixed signal designs.
As part of the evaluation, Lyric was used to floorplan, place and route several digital blocks in a new ON Semiconductor design. The entire design was a first pass success; completed and taped out in only five weeks. A parallel evaluation was undertaken against another leading EDA vendor’s tools, and Lyric proved comprehensively that it provided superior performance, flexibility and functionality.
Peter Zdebel, ON Semiconductor’s vice president and chief technology officer (CTO), said, “As we move towards reducing die size and mask costs, and narrowing our time to market, Lyric has already proven its worth in helping us to achieve our design goals. The reduction in manufacturing costs in the first six months of production for one design will provide an immediate return on the investment in one seat of Lyric.”
Lyric has also been used to re-place and re-route another design for ON Semiconductor’s automotive group, where it achieved significant reductions in die size. The die had previously been placed and routed with another set of tools.
Commenting on the new customer win, Ken Roberts, chief executive officer at Pulsic said, “Lyric proved its ability to undertake automatic placement of standard cells and routing on a custom digital block, taking only 10% of the time normally used by an incumbent vendor’s layout, chip placer and chip routing tools.”
Lyric’s unified shape-based design system has achieved significant design wins in the mixed signal, memory and custom digital market segments in the U.S., Europe and Asia by enabling layout designers to achieve high productivity and reduce die sizes by up to 30%, particularly as process geometries shrink.