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Press Release Archive
Bristol based Pulsic is UK’s third fastest-growing technology company
Custom Design Automation Leader Pulsic Granted Patent For Routing According To Current Density Rules
Custom Design Automation Leader Pulsic Launches Unity™ 2009.1 With Unique Automated Bus Routing Capabilities
Elixent Licenses Pulsic’s Lyric Physical Design Framework for Reduced Time-to-Market
Hynix Semiconductor Adopts Pulsic’s Lyric Shape Based Place & Route Flow
Hynix Semiconductors Further Extends Adoption of LyricT – Pulsic’s Shape-Based Place & Route Flow
New IC Routing Start-up Company – Pulsic – is Officially Announced
Oki reduces custom LSI layout design time in half with Pulsic technology
ON Semiconductor Licenses Pulsic’s Lyric Physical Design Framework
Pulsic Adds Analog/Mixed-Signal Expert to U.S. Team
Pulsic advances placement and routing technology
Pulsic Advisory Board Appoints Watanabe from Cadence Japan
Pulsic Announces Expansion in the U.S.
Pulsic Announces New Lyric Analog Product for Dedicated Analog/Analog RF Design
Pulsic Announces New Release of IC Analog / Mixed Signal Physical Design Solution
Pulsic Announces New Release of IC Physical Design Solution
Pulsic announces Unity 2008.1 after production testing and key input from major customers
Pulsic Appoints Ken Roberts as CEO
Pulsic Awarded Patent for Productivity Improving Spine-and-Stitch Chip Design Software
Pulsic creates new senior roles to reflect significant growth
Pulsic Enters “Big” Digital/ASIC Design Arena
Pulsic expands commitment to interoperability in custom design tools
Pulsic expands its sales operation and appoints Massimo Cecchetti as sales representative
Pulsic Forms Advisory Board: Magma President, Former VP of Cadence Agree to Act as Pulsic Advisors
Pulsic Launches New Shape-based IC Router
Pulsic launches Unity™: revolutionary all-in-one shape based physical design platform for high volume ICs
Pulsic Limited and D’GIPRO Design Automation & Marketing Pvt. Ltd announce distribution deal in India
Pulsic Names Buno Pati to its Board of Directors
PULSIC OPENS NEW HEADQUARTERS FOR US TERRITORY
Pulsic Partners with Seiko Instruments for Distribution in Japan
Pulsic Secures €5.3M First Round Investment
Pulsic Selected by Elpida Memory, Inc. for New 0.11µm Tool Flow
Pulsic to help drive greater custom design tool interoperability
Pulsic to Introduce Integrated, Full-chip Planning and Top-level Routing Solution for Custom IC Design at DAC 2011
Pulsic tools deployed by Toshiba Corporation for layout of next generation Flash Memory
Pulsic’s UniRoute Selected by STARC for STARCAD-AMS Analog/Mixed Signal Reference Flow
Saifun Adopts Pulsic Technology Following Rigorous Trial
Sanjiv Kaul Joins Pulsic Advisory Board
Turn on and tune into Pulsic at DAC 2006
Selected Press Coverage
Chip Design Magazine
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chipdesignmag.com
chipdesignmag.com
cieonline.co.uk
cieonline.co.uk
DAC Knowledge Center
deepchip.com
deepchip.com
Earth Times
EDA Cafe
EDA DesignLine
EDA Geek!
EDA Online – Tech-on
edacafe.com
edacafe.com
edacafe.com
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EE Times
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EETimes.eu
EETimes.eu
EETimes.eu
EETimes.eu
EETimes.eu
EETimes.eu UK
EETimesUK
EETimesUK
Electronic Design
Electronics Talk
Electronics Weekly
electronicstalk.com
electronicsweekly.com
electronicsweekly.com
Embedded Computing Design
euroasiasemiconductor.com
powermanagementdesignline.com
scdsource.com
SemiWiki.com
SemiWiki.com
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Products & Solutions
Pulsic Planning Solution™
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Technology
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UniEdit – Editor
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Unity
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Signal Integrity – Automatic differential pairs routing
Signal Integrity – Automatic net shielding
Whitepapers & Datasheets
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GarySmith EDA
IPL Alliance
Oki Electric Industry Co., Ltd
Saifun Semiconductors Ltd.
Toshiba
Press Release Archive
June 02, 2011
Pulsic to Introduce Integrated, Full-chip Planning and Top-level Routing Solution for Custom IC Design at DAC 2011
March 22, 2011
Pulsic's UniRoute Selected by STARC for STARCAD-AMS Analog/Mixed Signal Reference Flow
May 13, 2010
Pulsic to help drive greater custom design tool interoperability
Pres Coverage Archive
December 19, 2011
Chip Design Magazine
All I Want for Christmas Is a Capable Top Level Router
December 12, 2011
SemiWiki.com
Driving in the Bus lane
September 20, 2011
SemiWiki.com
The Requirements of Today’s Custom Signal Planning Methodologies
February 02, 2011
EE Times
Automatic shape-based routing to achieve parasitic constraint closure in custom design
January 25, 2011
DAC Knowledge Center
The Next Roadblock to Custom Design Productivity: Design Constraints
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