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Chip Design Magazine (19-Dec-2011)

All I Want for Christmas Is a Capable Top Level Router

SemiWiki.com (12-Dec-2011)

Driving in the Bus lane

SemiWiki.com (20-Sep-2011)

The Requirements of Today’s Custom Signal Planning Methodologies

EE Times (02-Feb-2011)

Automatic shape-based routing to achieve parasitic constraint closure in custom design

DAC Knowledge Center (25-Jan-2011)

The Next Roadblock to Custom Design Productivity: Design Constraints

EDA Cafe (01-Jun-2010)

What will it take for next generation routing to meet the needs of the most advanced process nodes and beyond

EDA Online - Tech-on (31-Jan-2010)

Current Top-down approach for Mixed-Signal Design isn't good enough, Pulsic Pushes the boundaries of Mixed Signal Layout Design Domains <<Japanese>>

Earth Times (28-May-2008)

Si2 Announces Member Demonstrations at DAC

Electronics Weekly (19-Mar-2008)

Move to 32nm could force design change for chips

scdsource.com (19-Dec-2007)

Flash Memory Demands Custom Design Automation

EETimes.eu (07-Nov-2007)

Pulsic appoints former Cadence Japan exec to advisory board

electronicsweekly.com (15-Oct-2007)

Pulsic licenses flash design tool to Saifun

EETimes.eu UK (14-Sep-2007)

Pulsic, S3 and Runcom lead company search ranking

Electronic Design (19-Jul-2007)

Analog/Full-Custom Flows Move Toward Interoperability

edacafe.com (08-Jul-2007)

Pulsic's Custom Design Automation Solution to be Displayed at Flash Memory Summit

EETimes.com (05-Jul-2007)

Constraints open new EDA standards battleground

Edadesignline.com (05-Jul-2007)

Constraints open new EDA standards battleground

chipdesignmag.com (26-Apr-2007)

Pulsic advances placement and routing technology

EETimes.com (08-Jan-2007)

EDA looks to two good years in a row

EETimes.com (02-Jan-2007)

EDA 07 forecast: strong, but watch the bumps

powermanagementdesignline.com (02-Jan-2007)

EDA '07 forecast: strong, but watch the bumps

EDA DesignLine (11-Dec-2006)

Overcoming high-volume IC design challenges to maximise profits

Electronics Talk (29-Sep-2006)

Rocketing sales take Pulsic to top three

Embedded Computing Design (28-Sep-2006)

Pulsic is UK's Third Fastest-Growing Tech Company

EDA Geek! (28-Sep-2006)

Pulsic Ranks Third in Sunday Times Microsoft Tech Track 100

cieonline.co.uk (01-Aug-2006)

The ABC of EDA from DAC 2006

EETimes.com (24-Jul-2006)

Imperas tops analyst Smith's watch list

EETimes.eu (13-Jul-2006)

Oki uses Pulsic router to reduce layout design time

EETimes.com (29-Jun-2006)

Ness, Pulsic set up India development center

EETimes.com (26-Jun-2006)

Pulsic announces Unity physical design software

electronicstalk.com (27-Apr-2006)

IC design software adds advanced placement

EETimes.com (27-Apr-2006)

Pulsic adjusts EDA tool in response to customers

chipdesignmag.com (01-Mar-2006)

A new route to improving time-to-yield

electronicsweekly.com (09-Dec-2005)

EDA firm Pulsic supports SETsquared initiative

euroasiasemiconductor.com (01-Dec-2005)

Shaping the yield curve (Log in required)

EETimes.eu (15-Nov-2005)

EDA luminaries join Pulsic advisory board

chipdesignmag.com (01-Sep-2005)

Shape The Design of Wireless Chips

deepchip.com (09-Jun-2005)

INDUSTRY GADFLY: "My Cheesy Must See List for DAC 2005"

EETimes.eu (15-Apr-2005)

Pati joins Pulsic board

EETimes.com (14-Apr-2005)

Numerical Technologies' founder joins board of EDA startup

chipdesignmag.com (01-Apr-2005)

Product News

EETimes.eu (22-Feb-2005)

Elixent uses Pulsic router for reconfigurable fabric ports

deepchip.com (09-Feb-2005)

DEATH TO VIRTUOSO! (Part III)

cieonline.co.uk (01-Oct-2004)

Hynix adopts Pulsic's place & route flow

EETimesUK (23-Oct-2003)

Place and route tool provides automation

edacafe.com (18-Jan-2002)

Pulsic Secures $5.5M First Round Investment

edacafe.com (18-Jan-2002)

New IC Routing Start-up Company - Pulsic - is Officially Announced

EETimesUK (16-Jan-2002)

Gridless IC router shapes up with combined effort
 
Source: http://pulsic.com/news/selected-press-coverage/