Created by engineers for engineers, DesignCon’s highly technical program addresses critical issues around PCB design tools, RF and signal integrity, FPGA design, IC and semiconductor components, verification tools, high-speed serial design and many other relevant topics. In addition, come hear Pulsic’s Senior Technologist, Bob Eisenstadt present “A Practical and Reliable Methodology for Hierarchical Signal Planning” in the AMS track on Tuesday (2/1), 9:20-10:00 in Ballroom C. Session# (2-TA2).

Dates: January 30 – February 2, 2012
Location: Santa Clara Convention Center, Santa Clara, CA
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